PACTOR · hfmodem

Generation	Waveform	Link structure
PACTOR-1	100 / 200 Bd FSK	Link entry, data packets and control signals
PACTOR-2	Two differential PSK carriers	Coded data and negotiated speed levels
PACTOR-3	2–18 differential PSK carriers	Six speed levels on a 120 Hz grid

THE CARRIER SET

PACTOR-3 channel occupancy

PACTOR-3 uses up to eighteen independently pulse-shaped 100 Bd carriers on a 120 Hz grid from 480 to 2520 Hz. Each speed level selects a symmetric carrier set, modulation and code rate.

Speed level

DBPSK has two differential phase states; DQPSK has four. Channels 5 and 12 carry the variable header and control signals.

This speed level

Symmetric about 1500 Hz

Every tone map is mirror-symmetric around the 1500 Hz centre, and every one contains channels 5 & 12. SL1 uses those two carriers; SL6 uses all eighteen. The net user rate climbs from 77 bit/s to 2722 bit/s across the six levels.

LINK SETUP

Link entry

A PACTOR-1 connect burst carries the called callsign in a dual-rate FSK frame. The link can remain in PACTOR-1 or negotiate a higher generation after entry. The encoder below shows the address frame for the selected callsign.

Called callsign

The frame, byte by byte

Closed form (per callsign)

T = [0x55] + ascii(call) + 0x0F… to 9 bytes
# address section, 100 Bd (9 bytes)
raw = T
# redundancy section, 200 Bd (6 bytes)
red = T[1:7]
MARK(bit 1)=1400 Hz · SPACE(bit 0)=1600 Hz
LSB-first · continuous phase · no CRC

Dual-rate frame

The connect frame contains nine bytes at 100 Bd followed by six redundancy bytes at 200 Bd, with continuous phase across the rate change. The receiver demodulates the two sections at their respective rates.

Callsign bytes

The address sends uppercase ASCII after the sync byte, padded with 0x0F. The redundancy section repeats address bytes 1 through 6 at 200 Bd.

PACTOR-1 and PACTOR-2 data

PACTOR-1 carries data with 100 or 200 Bd FSK. A packet contains a header, payload, status and CRC; the receiver replies with a control signal in the fixed cycle.

PACTOR-2 uses two 100 Bd differential PSK carriers at 1400 and 1600 Hz. Its four speed levels select DBPSK or DQPSK and convolutional code rates. The K=9 code is punctured to 2/3 at SL3 and 7/8 at SL4. The payload is interleaved and protected by CRC-16/X25.

Generation	Frame arrangement	Rate selection
PACTOR-1	Header → data → status → CRC	100 / 200 Bd
PACTOR-2	Frame marker → coded data	SL1–4
PACTOR-3	Phase reference → headers → coded data	SL1–6

PACTOR-2 transmit payloads have independent monitor evidence at SL1–3. Its control-signal keying remains an implementation hypothesis. PACTOR-3 parameters and figures follow below.

THE DATA PACKET

PACTOR-3 frame structure

The short cycle lasts 1.25 s. A data packet contains a phase reference, headers and coded data.

A phase-reference symbol precedes the header block. The variable header carries speed level and cycle on channels 5 and 12; other active carriers send constant headers. The data field carries payload, status and CRC-16/X25. Link acquisition uses a separate burst.

The coding chain

Payload bytes are whitened, convolutionally coded, punctured and permuted onto the active carriers. The receiver uses soft-decision Viterbi decoding and CRC-16/X25. Each speed level selects its interleaving stride.

Phase-reference symbol — Schroeder's quadratic

A phase-reference symbol precedes the data. Carrier k starts at −πk(k+1)/18, a quadratic phase assignment that reduces crest factor. Subsequent symbols encode differential phase changes.

PACTOR-3 control signals

Six 20-bit control words are transmitted with DBPSK on channels 5 and 12. Every pair differs in 12 bits.

pairwise distance (bits)

Header detection

The receiver correlates the variable-header channels against known codewords to identify speed level and cycle.

Sender

Receiver

Data frame →

← Control signal · ACK / repeat

Schematic · data left to right; reply right to left

THE ARQ CYCLE

ARQ timing and the host interface

PACTOR uses cycle-locked stop-and-wait ARQ with control signals for acknowledgements, repeats and rate changes. Shrike exposes an SCS PTC serial host interface.

Connect → transfer → disconnect

Control signals → ARQ events

CS1 / CS2	ACK · request next
CS3	break-in
CS4	speed up one level
CS5	NAK · speed down
CS6	toggle cycle length

The mapping from codeword to event is not fixed by the published description.

1.25s

short cycle

window (stop & wait)

mem

-ARQ soft combine

THE NUMBERS

Protocol constants

PACTOR-3 physical-layer and timing values follow ITU-R M.1798. Coding tables below describe the shrike implementation.

▸ Physical layer ITU-R M.1798

Quantity	Value
Carriers	independent pulse-shaped DPSK · not OFDM
Symbol rate	Bd
Tone spacing · channel 0	Hz · Hz
Occupied band · centre	– Hz · Hz
Header / control channels	5 & 12 (1080 / 1920 Hz)
Emission designator

▸ Speed levels ITU-R M.1798

▸ PACTOR-1 connect §2

Quantity	Value
Waveform	single dual-rate FSK frame · continuous phase
Rates	9 B @ 100 Bd (address) + 6 B @ 200 Bd (redundancy)
Tones	MARK/bit1 = 1400 Hz · SPACE/bit0 = 1600 Hz · LSB-first
Address image	T = [0x55] + ASCII(call) + 0x0F fill → 9 B
On-air bytes	Address T, followed by T[1:7] at 200 Bd
Frame CRC	none — the receiver validates the recovered characters instead
Address field	any callsign; the frame carries no capability field, so a connect does not negotiate a generation

▸ Coding chain §3

Quantity	Value
Whitening	word[i] ^= crc16_table[i] on info bytes · not in the spec
Data conv code · SL1	K=9 · · rate 1/2
Data conv code · SL2–6	K=7 ·
Transmit G0/G1 order	, bits packed LSB-first over the transmit form, terminated, over the whitened field
Puncture · SL5 (3/4)	G1= G2=
Puncture · SL6 (8/9)	G1= G2=
Interleaver	Stride by speed level: . At SL1, channel order matches code order. Full-frame interleaver geometry remains unresolved.
Decoder	soft-decision Viterbi
CRC	CRC-16/X25 (0x1021, init/xor 0xFFFF, reflected, residue 0xF0B8)

▸ Packet structure & control signals §3

Quantity	Value
Acquisition preamble	±800 low-PAPR multitone burst used for link acquisition
Phase-reference symbol	1 symbol, no data · channel k keyed at −πk(k+1)/18 (Schroeder)
Header block	DQPSK · symbols on every lit tone · constant headers + variable, on 5 & 12. No FEC field: the codewords are published and the decoder matched-filters them
Data-field modulation	differential · dibit → phase step
Grid rows / carrier	(short cycle) · (long)
Control signals CS1–6	52D56 · AABA2 · AD45A · 95AC5 · 74339 · 4B4AD (20-bit, d=12)
SL header — detection mechanism	matched-filter correlation over the known codewords, thresholded per SL hypothesis
Packet on an established link	One phase-reference symbol, the header block and data rows. A trailing run-out symbol carries no data.

▸ ARQ & cycle timing ITU-R M.1798

Quantity	Value
Scheme	cycle-locked stop-and-wait · window 1 · memory-ARQ
Cycle length	short s · long s (longpath / s)
Phase-reference pulse	one symbol before each packet and control signal
Control-signal window	s
Carrier swap	tones swapped per cycle (involution, fixes 5↔12) — frequency diversity
Speed adaptation	climb on ACK, drop on NAK (CS4 / CS5)
Link-layer FSM	stop-and-wait + gear-shift + graceful disconnect
Host interface	SCS PTC serial hostmode

Observed results

Confirmed outbound mail delivery through WS8EOC over PACTOR-3 (message 9WQNVWBDLVOY). Four messages received through KB5LZK over PACTOR-1, with a normal session close.

PACTOR-2 codec behavior has bench evidence. PACTOR-3 mail delivery is demonstrated through one gateway; speed-level coverage and reliability across gateways remain open.

Implementation evidence records the conditions and coverage.